gpio - zygaena/hammerhead

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/*
 * This file and its contents are supplied under the terms of the
 * Common Development and Distribution License ("CDDL"), version 1.0.
 * You may only use this file in accordance with the terms of version
 * 1.0 of the CDDL.
 *
 * A full copy of the text of the CDDL should have accompanied this
 * source.  A copy of the CDDL is also available via the Internet at
 * http://www.illumos.org/license/CDDL.
 */

/*
 * Copyright 2022 Oxide Computer Company
 */

#ifndef _SYS_GPIO_DPIO_H
#define	_SYS_GPIO_DPIO_H

/*
 * Definitions that consumers of DPIOs should likely know about.
 */

#ifdef __cplusplus
extern "C" {
#endif

/*
 * This is the general size of names in the dpio structures. Actual name lengths
 * and limits are potentially less.
 */
#define	DPIO_NAMELEN	64

/*
 * Basic IOCTL information
 */
#define	DPIO_IOC	(('d' << 24) | ('p' << 16) | ('i' << 8))

/*
 * This is the set of values that are expected on a write(2) to a DPIO to set
 * the output state. Each write(2) must be a uint32_t (4 bytes) in size.
 */
typedef enum {
	DPIO_OUTPUT_LOW	= 0,
	DPIO_OUTPUT_HIGH = 1,
	DPIO_OUTPUT_DISABLE = UINT32_MAX
} dpio_output_t;

/*
 * This is the set of values that are expected on a read(2) of a DPIO to get the
 * input state. Each read(2) must be a uint32_t (4 bytes) in size.
 */
typedef enum {
	DPIO_INPUT_LOW = 0,
	DPIO_INPUT_HIGH = 1
} dpio_input_t;

/*
 * This indicates features that the DPIO is set up for and supports.
 */
typedef enum {
	DPIO_C_READ	= 1 << 0,
	DPIO_C_WRITE	= 1 << 1,
	DPIO_C_POLL	= 1 << 2
} dpio_caps_t;

typedef enum {
	DPIO_F_KERNEL	= 1 << 0,
} dpio_flags_t;

/*
 * This is the basic information structure for a DPIO. It reports information
 * about what is supported and usable. This is accessible via the dpinfo
 * interface or via the dpio itself. If this is called directly on a dpio
 * itself, then the dpi_dpio field will be the DPIO's name.
 */
#define	DPIO_IOC_INFO	(DPIO_IOC | 1)
typedef struct {
	char		dpi_dpio[DPIO_NAMELEN];
	char		dpi_ctrl[DPIO_NAMELEN];
	uint32_t	dpi_gpio;
	dpio_caps_t	dpi_caps;
	dpio_flags_t	dpi_flags;
	uint32_t	dpi_pad;
} dpio_info_t;

/*
 * This is used to get information about the current timing information. If the
 * system supports interrupts on changes and it has been enabled, then this will
 * be used to indicate the last time we received an update.
 */
#define	DPIO_IOC_TIMING	(DPIO_IOC | 2)
typedef struct {
	hrtime_t	dpt_last_input_intr;
	hrtime_t	dpt_last_write;
} dpio_timing_t;

/*
 * This is used to get access to the current output state that has been set on
 * the DPIO. This is only available via the dpio itself, it is not available via
 * dpinfo as it is information specific to current consumers.
 */
#define	DPIO_IOC_CUROUT	(DPIO_IOC | 3)
typedef struct {
	dpio_output_t	dps_curout;
	uint32_t	dps_pad;
} dpio_curout_t;

#ifdef __cplusplus
}
#endif

#endif /* _SYS_GPIO_DPIO_H */
/*
 * This file and its contents are supplied under the terms of the
 * Common Development and Distribution License ("CDDL"), version 1.0.
 * You may only use this file in accordance with the terms of version
 * 1.0 of the CDDL.
 *
 * A full copy of the text of the CDDL should have accompanied this
 * source.  A copy of the CDDL is also available via the Internet at
 * http://www.illumos.org/license/CDDL.
 */

/*
 * Copyright 2022 Oxide Computer Company
 */

#ifndef _SYS_GPIO_GPIO_SIM_H
#define	_SYS_GPIO_GPIO_SIM_H

/*
 * GPIO Simulator Driver attribute definitions.
 *
 * This driver is purely synthetic, it exists for testing.
 */

#ifdef __cplusplus
extern "C" {
#endif

/*
 * KGPIO_ATTR_NAME -- ro
 *	string
 *
 * This contains the GPIO's name. These names are semantic things that we use to
 * make understanding testing easier.
 */

/*
 * GPIO_SIM_ATTR_OUTPUT -- rw
 *	uint32_t -- gpio_sim_output_t
 *
 * GPIO_SIM_ATTR_INPUT -- ro
 *	uint32_t -- gpio_sim_input_t
 *
 * This pair allows you to set the GPIO's output and then see what the input
 * value is.
 */
#define	GPIO_SIM_ATTR_OUTPUT	"sim:output"
typedef enum {
	GPIO_SIM_OUTPUT_DISABLED,
	GPIO_SIM_OUTPUT_LOW,
	GPIO_SIM_OUTPUT_HIGH
} gpio_sim_output_t;

#define	GPIO_SIM_ATTR_INPUT	"sim:input"
typedef enum {
	GPIO_SIM_INPUT_LOW,
	GPIO_SIM_INPUT_HIGH
} gpio_sim_input_t;

/*
 * To make this somewhat usable, we define an additional three properties that
 * are used to describe information about a GPIO.
 *
 * GPIO_SIM_ATTR_PULL -- rw
 *	uint32_t -- gpio_sim_pull_t
 *
 * This is a synthetic version of the pull-up/down control.
 *
 * GPIO_SIM_ATTR_VOLTAGE -- ro
 *	uint32_t -- gpio_sim_voltage_t
 *
 * This is a synthetic read-only value that we use as part of our testing.
 *
 * GPIO_SIM_ATTR_SPEED -- rw
 *	uint32_t -- gpio_sim_speed_t
 *
 * This would control something like the various rise times exist on a GPIO and
 * is an homage to the fact that everyone wants to set the fastest, but
 * generally you actually want the slowest!
 */
#define	GPIO_SIM_ATTR_PULL	"sim:pull"
typedef enum {
	GPIO_SIM_PULL_DISABLED,
	GPIO_SIM_PULL_DOWN,
	GPIO_SIM_PULL_DOWN_23K,
	GPIO_SIM_PULL_UP,
	GPIO_SIM_PULL_UP_5K,
	GPIO_SIM_PULL_UP_40K,
	GPIO_SIM_PULL_BOTH
} gpio_sim_pull_t;

#define	GPIO_SIM_ATTR_VOLTAGE	"sim:voltage"
typedef enum {
	GPIO_SIM_VOLTAGE_1P8,
	GPIO_SIM_VOLTAGE_3P3,
	GPIO_SIM_VOLTAGE_12P0,
	GPIO_SIM_VOLTAGE_54P5
} gpio_sim_voltage_t;

#define	GPIO_SIM_ATTR_SPEED	"sim:speed"
typedef enum {
	GPIO_SIM_SPEED_LOW,
	GPIO_SIM_SPEED_MEDIUM,
	GPIO_SIM_SPEED_HIGH,
	GPIO_SIM_SPEED_VERY_HIGH
} gpio_sim_speed_t;

#ifdef __cplusplus
}
#endif

#endif /* _SYS_GPIO_GPIO_SIM_H */
/*
 * This file and its contents are supplied under the terms of the
 * Common Development and Distribution License ("CDDL"), version 1.0.
 * You may only use this file in accordance with the terms of version
 * 1.0 of the CDDL.
 *
 * A full copy of the text of the CDDL should have accompanied this
 * source.  A copy of the CDDL is also available via the Internet at
 * http://www.illumos.org/license/CDDL.
 */

/*
 * Copyright 2022 Oxide Computer Company
 */

#ifndef _SYS_GPIO_KGPIO_H
#define	_SYS_GPIO_KGPIO_H

/*
 * User / Kernel kgpio interface
 */

#include <sys/stdint.h>
#include <sys/param.h>
#include <sys/gpio/kgpio_attr.h>

#ifdef __cplusplus
extern "C" {
#endif

#define	KGPIO_IOC	(('k' << 24) | ('g' << 16) | ('p' << 8))

/*
 * Obtain basic information about a GPIO controller.
 */
#define	KGPIO_IOC_CTRL_INFO	(KGPIO_IOC | 1)
typedef struct {
	uint32_t	kci_ngroups;
	uint32_t	kci_ngpios;
	uint32_t	kci_ndpios;
	uint32_t	kci_pad;
	char		kci_devpath[MAXPATHLEN];
} kgpio_ctrl_info_t;

/*
 * This gets detailed information about a given GPIO. It includes all the
 * provider's attributes as well for the GPIO.
 */
#define	KGPIO_IOC_GPIO_INFO	(KGPIO_IOC | 2)

typedef enum {
	KGPIO_GPIO_F_DPIO	= 1 << 0
} kgpio_gpio_flags_t;

typedef struct {
	uint32_t		kgi_id;
	kgpio_gpio_flags_t	kgi_flags;
	uintptr_t		kgi_attr;
	size_t			kgi_attr_len;
} kgpio_gpio_info_t;

/*
 * This is used to set the attributes of a given GPIO. It takes an nvlist_t and
 * also returns an nvlist_t of errors.
 */
#define	KGPIO_IOC_GPIO_UPDATE	(KGPIO_IOC | 3)

typedef enum {
	/*
	 * This flag is set by the kernel on return. If the system returns 0,
	 * then this must be checked to see if there were errors available.
	 */
	KGPIO_UPDATE_ERROR = 1 << 0,
	/*
	 * Indicates that the information in the error NVL is valid.
	 */
	KGPIO_UPDATE_ERR_NVL_VALID = 1 << 1
} kgpio_update_flags_t;

typedef struct {
	uint32_t		kgu_id;
	kgpio_update_flags_t	kgu_flags;
	uintptr_t		kgu_attr;
	size_t			kgu_attr_len;
	uintptr_t		kgu_err;
	size_t			kgu_err_len;
} kgpio_update_t;

/*
 * This is used to create a DPIO from a given GPIO.
 */
#define	KGPIO_IOC_DPIO_CREATE	(KGPIO_IOC | 4)

typedef enum {
	/*
	 * Indicates that reading the input value of the DPIO is allowed.
	 */
	KGPIO_DPIO_F_READ	= 1 << 0,
	/*
	 * Indicates that setting the output value of the DPIO is allowed.
	 */
	KGPIO_DPIO_F_WRITE	= 1 << 1,
	/*
	 * Indicates that the DPIO should be restricted to only the kernel.
	 */
	KGPIO_DPIO_F_KERNEL	= 1 << 2
} kgpio_dpio_flags_t;

#define	KGPIO_DPIO_NAMELEN	32

typedef struct {
	uint32_t		kdc_id;
	kgpio_dpio_flags_t	kdc_flags;
	char			kdc_name[KGPIO_DPIO_NAMELEN];
} kgpio_dpio_create_t;

/*
 * This is used to destroy a DPIO that is bound to the specific GPIO.
 */
#define	KGPIO_IOC_DPIO_DESTROY	(KGPIO_IOC | 5)
typedef struct {
	uint32_t	kdd_id;
	uint32_t	kdd_pad;
} kgpio_dpio_destroy_t;

/*
 * Determines if a GPIO with the specified name is present on the given
 * controller. If so, its ID is returned.
 */
#define	KGPIO_IOC_GPIO_NAME2ID	(KGPIO_IOC | 6)
typedef struct {
	char		kin_name[MAXPATHLEN];
	uint32_t	kin_id;
} kgpio_ioc_name2id_t;

/*
 * Kernel-specific views for 32-bit.
 */
#ifdef	_KERNEL
typedef struct {
	uint32_t		kgi_id;
	kgpio_gpio_flags_t	kgi_flags;
	uintptr32_t		kgi_attr;
	size32_t		kgi_attr_len;
} kgpio_gpio_info32_t;

typedef struct {
	uint32_t		kgu_id;
	kgpio_update_flags_t	kgu_flags;
	uintptr32_t		kgu_attr;
	size32_t		kgu_attr_len;
	uintptr32_t		kgu_err;
	size32_t		kgu_err_len;
} kgpio_update32_t;
#endif	/* _KERNEL */

#ifdef __cplusplus
}
#endif

#endif /* _SYS_GPIO_KGPIO_H */
/*
 * This file and its contents are supplied under the terms of the
 * Common Development and Distribution License ("CDDL"), version 1.0.
 * You may only use this file in accordance with the terms of version
 * 1.0 of the CDDL.
 *
 * A full copy of the text of the CDDL should have accompanied this
 * source.  A copy of the CDDL is also available via the Internet at
 * http://www.illumos.org/license/CDDL.
 */

/*
 * Copyright 2022 Oxide Computer Company
 */

#ifndef _SYS_GPIO_KGPIO_ATTR_H
#define	_SYS_GPIO_KGPIO_ATTR_H

/*
 * This file contains the shared definitions that are useful for understanding
 * attributes. This includes both the shared fields and required attributes as
 * well as more advanced error codes related to attributes.
 */

#ifdef __cplusplus
extern "C" {
#endif

/*
 * GPIOs themselves are made up of several attributes that are communicated as
 * an nvlist_t. While most attributes are determined by the provider and are
 * required to be prefixed as such, a few are standardized across everything.
 *
 * Note: At this time, the possible information only allows for fully enumerated
 * lists of values. We should consider adding support for ranges ala mac.
 */
#define	KGPIO_ATTR_NAME	"name"
#define	KGPIO_ATTR_META	"metadata"
#define	KGPIO_ATTR_PROT	"protection"
#define	KGPIO_ATTR_POS	"possible"

typedef enum {
	KGPIO_PROT_RO,
	KGPIO_PROT_RW
} kgpio_prot_t;

/*
 * When setting attributes, these are valid reasons that an attribute may be
 * invalid or not settable.
 */
typedef enum {
	/*
	 * Actually, no problem.
	 */
	KGPIO_ATTR_ERR_OK,
	/*
	 * Indicates that an attempt was made to set a read-only attribute.
	 */
	KGPIO_ATTR_ERR_ATTR_RO,
	/*
	 * Indicates that the requested attribute was not known to the provider.
	 */
	KGPIO_ATTR_ERR_UNKNOWN_ATTR,
	/*
	 * Indicates that the attributes type is not correct.
	 */
	KGPIO_ATTR_ERR_BAD_TYPE,
	/*
	 * Indicates that the attribute's value was unknown to the provider.
	 */
	KGPIO_ATTR_ERR_UNKNOWN_VAL,
	/*
	 * Indicates that while the provider knows this value, it is not valid
	 * for this GPIO or for the GPIO in its current configuration (e.g.
	 * asking for a high push-pull output for an open-drain pin).
	 */
	KGPIO_ATTR_ERR_CANT_APPLY_VAL
} kgpio_attr_err_t;

#ifdef __cplusplus
}
#endif

#endif /* _SYS_GPIO_KGPIO_ATTR_H */
/*
 * This file and its contents are supplied under the terms of the
 * Common Development and Distribution License ("CDDL"), version 1.0.
 * You may only use this file in accordance with the terms of version
 * 1.0 of the CDDL.
 *
 * A full copy of the text of the CDDL should have accompanied this
 * source.  A copy of the CDDL is also available via the Internet at
 * http://www.illumos.org/license/CDDL.
 */

/*
 * Copyright 2022 Oxide Computer Company
 */

#ifndef _SYS_GPIO_KGPIO_PROVIDER_H
#define	_SYS_GPIO_KGPIO_PROVIDER_H

/*
 * This header describes the private interface between the kernel GPIO framework
 * and GPIO providers.
 */

#include <sys/nvpair.h>
#include <sys/stdint.h>

#include <sys/gpio/dpio.h>
#include <sys/gpio/kgpio_attr.h>

#ifdef __cplusplus
extern "C" {
#endif


/*
 * The remainder of this header is intended for kernel implementations of the
 * KGPIO framework.
 */
#ifdef _KERNEL

typedef int (*kgpio_name2id_f)(void *, const char *, uint32_t *);
typedef int (*kgpio_attr_get_f)(void *, uint32_t, nvlist_t *);
typedef int (*kgpio_attr_set_f)(void *, uint32_t, nvlist_t *, nvlist_t *);
typedef int (*kgpio_dpio_cap_f)(void *, uint32_t, dpio_caps_t *);
typedef int (*kgpio_dpio_input_f)(void *, uint32_t, dpio_input_t *);
typedef int (*kgpio_dpio_output_get_f)(void *, uint32_t, dpio_output_t *);
typedef int (*kgpio_dpio_output_set_f)(void *, uint32_t, dpio_output_t);

typedef struct kgpio_ops {
	kgpio_name2id_f		kgo_name2id;
	kgpio_attr_get_f	kgo_get;
	kgpio_attr_set_f	kgo_set;
	kgpio_dpio_cap_f	kgo_cap;
	kgpio_dpio_input_f	kgo_input;
	kgpio_dpio_output_get_f	kgo_output_state;
	kgpio_dpio_output_set_f	kgo_output;
} kgpio_ops_t;

extern int kgpio_register(dev_info_t *, const kgpio_ops_t *, void *, uint32_t);
extern int kgpio_unregister(dev_info_t *);

/*
 * These are convenience functions for filling in information about an
 * attribute.
 */
extern void kgpio_nvl_attr_fill_u32(nvlist_t *, nvlist_t *, const char *,
    uint32_t, uint_t, uint32_t *, kgpio_prot_t);
extern void kgpio_nvl_attr_fill_str(nvlist_t *, nvlist_t *, const char *,
    const char *, uint_t, char *const *, kgpio_prot_t);

#endif	/* _KERNEL */

#ifdef __cplusplus
}
#endif

#endif /* _SYS_GPIO_KGPIO_PROVIDER_H */
/*
 * This file and its contents are supplied under the terms of the
 * Common Development and Distribution License ("CDDL"), version 1.0.
 * You may only use this file in accordance with the terms of version
 * 1.0 of the CDDL.
 *
 * A full copy of the text of the CDDL should have accompanied this
 * source.  A copy of the CDDL is also available via the Internet at
 * http://www.illumos.org/license/CDDL.
 */

/*
 * Copyright 2025 Oxide Computer Company
 */

#ifndef _SYS_GPIO_LTC4306_H
#define	_SYS_GPIO_LTC4306_H

/*
 * LTC4306 driver GPIO attribute definitions.
 *
 * The LTC4306 supports two basic attributes in addition to the standard name
 * attribute KGPIO_ATTR_NAME.
 */

#ifdef __cplusplus
extern "C" {
#endif

/*
 * LTC4306_GPIO_ATTR_INTPUT -- ro
 *	uint32_t -- ltc4306_gpio_input_t
 */
#define	LTC4306_GPIO_ATTR_INPUT		"ltc4306:input"
typedef enum {
	LTC4306_GPIO_INPUT_LOW,
	LTC4306_GPIO_INPUT_HIGH
} ltc4306_gpio_input_t;

/*
 * LTC4306_GPIO_ATTR_OUTPUT -- rw
 *	uint32_t -- ltc4306_gpio_output_t
 *
 * This controls the GPIO's output value. If the GPIO is configured as an input,
 * modifying this will not impact anything. When the output is set to disabled,
 * then the pin is put into an input-only mode.
 */
#define	LTC4306_GPIO_ATTR_OUTPUT	"ltc4306:output"
typedef enum {
	LTC4306_GPIO_OUTPUT_DISABLED,
	LTC4306_GPIO_OUTPUT_LOW,
	LTC4306_GPIO_OUTPUT_HIGH
} ltc4306_gpio_output_t;

/*
 * LTC4306_GPIO_ATTR_OUTPUT_MODE -- rw
 *	uint32_t -- ltc4306_gpio_output_mode_t
 *
 * This controls whether the pin is configured as an open-drain pin or a
 * push-pull.
 */
#define	LTC4306_GPIO_ATTR_OUTPUT_MODE	"ltc4306:output_mode"
typedef enum {
	LTC4306_GPIO_OUTPUT_MODE_PUSH_PULL,
	LTC4306_GPIO_OUTPUT_MODE_OPEN_DRAIN
} ltc4306_gpio_output_mode_t;

#ifdef __cplusplus
}
#endif

#endif /* _SYS_GPIO_LTC4306_H */
/*
 * This file and its contents are supplied under the terms of the
 * Common Development and Distribution License ("CDDL"), version 1.0.
 * You may only use this file in accordance with the terms of version
 * 1.0 of the CDDL.
 *
 * A full copy of the text of the CDDL should have accompanied this
 * source.  A copy of the CDDL is also available via the Internet at
 * http://www.illumos.org/license/CDDL.
 */

/*
 * Copyright 2025 Oxide Computer Company
 */

#ifndef _SYS_GPIO_PCA953X_H
#define	_SYS_GPIO_PCA953X_H

/*
 * PCA953x driver GPIO attribute definitions.
 *
 * The PCA953x driver provides a very simple GPIO interface that supports four
 * basic attributes: controlling the output, controlling the input polarity, and
 * the standard name attribute.
 */

#ifdef __cplusplus
extern "C" {
#endif

/*
 * PCA953X_GPIO_ATTR_INTPUT -- ro
 *	uint32_t -- pca953x_gpio_input_t
 */
#define	PCA953X_GPIO_ATTR_INPUT		"pca953x:input"
typedef enum {
	PCA953X_GPIO_INPUT_LOW,
	PCA953X_GPIO_INPUT_HIGH
} pca953x_gpio_input_t;

/*
 * PCA953X_GPIO_ATTR_OUTPUT -- rw
 *	uint32_t -- pca953x_gpio_output_t
 *
 * This controls the GPIO's output value. If the GPIO is configured as an input,
 * modifying this will not impact anything. When the output is set to disabled,
 * then the pin is put into an input-only mode.
 */
#define	PCA953X_GPIO_ATTR_OUTPUT	"pca953x:output"
typedef enum {
	PCA953X_GPIO_OUTPUT_DISABLED,
	PCA953X_GPIO_OUTPUT_LOW,
	PCA953X_GPIO_OUTPUT_HIGH
} pca953x_gpio_output_t;

/*
 * PCA953X_GPIO_ATTR_POLARITY -- rw
 *	uint32_t -- pca953x_gpio_polarity_t
 *
 * This controls whether the input register reads back an inverted value or not.
 */
#define	PCA953X_GPIO_ATTR_POLARITY	"pca953x:polarity"
typedef enum {
	PCA953X_GPIO_POLARITY_NORMAL,
	PCA953X_GPIO_POLARITY_INVERTED
} pca953x_gpio_polarity_t;

#ifdef __cplusplus
}
#endif

#endif /* _SYS_GPIO_PCA953X_H */
/*
 * This file and its contents are supplied under the terms of the
 * Common Development and Distribution License ("CDDL"), version 1.0.
 * You may only use this file in accordance with the terms of version
 * 1.0 of the CDDL.
 *
 * A full copy of the text of the CDDL should have accompanied this
 * source.  A copy of the CDDL is also available via the Internet at
 * http://www.illumos.org/license/CDDL.
 */

/*
 * Copyright 2022 Oxide Computer Company
 */

#ifndef _SYS_GPIO_ZEN_GPIO_H
#define	_SYS_GPIO_ZEN_GPIO_H

/*
 * AMD Zen GPIO attribute definitions.
 *
 * This covers most attributes for Zen 1 - 4 based GPIOs (and possibly earlier
 * families). Most attributes are passed through for user consumption with a few
 * exceptions right now around interrupt and wake control as those are not
 * things that we expect to be manipulated.
 */

#ifdef __cplusplus
extern "C" {
#endif

/*
 * These five attributes are used to communicate basic identifying information
 * about the GPIO.
 *
 * KGPIO_ATTR_NAME -- ro
 *	string
 *
 * This contains the GPIO's name. This is the GPIO portion of the name that the
 * PPR uses.
 *
 * ZEN_GPIO_ATTR_PAD_NAME -- ro
 *	string
 *
 * This contains the name of the pad that the GPIO uses according to the PPR.
 * This may match the GPIO's name, but may be different.
 *
 * ZEN_GPIO_ATTR_PAD_TYPE -- ro
 *	uint32_t -- zen_gpio_pad_type_t
 *
 * This describes the type of pad that we have.
 *
 * ZEN_GPIO_ATTR_PIN -- ro
 *	string
 *
 * This contains the name of the pin on the socket.
 *
 * ZEN_GPIO_ATTR_CAPS -- ro
 *
 * This contains some of the internal notes on the capabilities the pin
 * theoretially has.
 */
#define	ZEN_GPIO_ATTR_PAD_NAME	"zen:pad_name"
#define	ZEN_GPIO_ATTR_PAD_TYPE	"zen:pad_type"
#define	ZEN_GPIO_ATTR_PIN	"zen:pin"
#define	ZEN_GPIO_ATTR_CAPS	"zen:caps"

typedef enum {
	ZEN_GPIO_PAD_TYPE_GPIO,
	ZEN_GPIO_PAD_TYPE_SD,
	ZEN_GPIO_PAD_TYPE_I2C,
	ZEN_GPIO_PAD_TYPE_I3C
} zen_gpio_pad_type_t;

typedef enum {
	/*
	 * Indicates that the GPIO supports interrupts.
	 */
	ZEN_GPIO_C_AGPIO = 1 << 0,
	/*
	 * Indicates that the GPIO is part of a remote block, which
	 * means more shenanigans to get it to work.
	 */
	ZEN_GPIO_C_REMOTE = 1 << 1
} zen_gpio_cap_t;

/*
 * ZEN_GPIO_ATTR_OUTPUT_DRIVER -- ro
 *	uint32_t -- zen_gpio_driver_mode_t
 *
 * This describes the mode of the output driver for a given GPIO. Note, in Zen 4
 * this is configurable for I3C based GPIOs.
 */
#define	ZEN_GPIO_ATTR_OUTPUT_DRIVER	"zen:output_driver"
typedef enum {
	ZEN_GPIO_DRIVER_UNKNOWN,
	ZEN_GPIO_DRIVER_PUSH_PULL,
	ZEN_GPIO_DRIVER_OPEN_DRAIN
} zen_gpio_driver_mode_t;

/*
 * ZEN_GPIO_ATTR_OUTPUT -- rw
 *	uint32_t -- zen_gpio_output_t
 *
 * This controls what the GPIO's output is. For open-drain style pins, the only
 * options that are valid are disabled and low.
 */
#define	ZEN_GPIO_ATTR_OUTPUT	"zen:output"
typedef enum {
	ZEN_GPIO_OUTPUT_DISABLED,
	ZEN_GPIO_OUTPUT_LOW,
	ZEN_GPIO_OUTPUT_HIGH
} zen_gpio_output_t;

/*
 * ZEN_GPIO_ATTR_INPUT -- ro
 *	uint32_t -- zen_gpio_input_t
 *
 * This describes the current input value of the pin.
 */
#define	ZEN_GPIO_ATTR_INPUT	"zen:input"
typedef enum {
	ZEN_GPIO_INPUT_LOW,
	ZEN_GPIO_INPUT_HIGH
} zen_gpio_input_t;

/*
 * ZEN_GPIO_ATTR_VOLTAGE -- ro
 *	zen_gpio_voltage_t
 *
 * This describes the different type of voltages that a given pin supports.
 * Note, all the pad registers are not driven as part of the GPIO driver and
 * therefore changes to this are not supported (today).
 */
#define	ZEN_GPIO_ATTR_VOLTAGE	"zen:voltage"

typedef enum {
	ZEN_GPIO_V_UNKNOWN = 0,
	ZEN_GPIO_V_1P1_S3 = 1 << 0,
	ZEN_GPIO_V_1P8_S5 = 1 << 1,
	ZEN_GPIO_V_1P8_S0 = 1 << 2,
	ZEN_GPIO_V_3P3_S5 = 1 << 3,
	ZEN_GPIO_V_3P3_S0 = 1 << 4
} zen_gpio_voltage_t;

/*
 * ZEN_GPIO_ATTR_PULL -- rw
 *	uint32_t -- zen_gpio_pull_t
 *
 * This controls the pull and strength of a GPIO. Note, some pins require a
 * strength to be specified where as others do not support this. This varies
 * based on the specific chip and socket.
 */
#define	ZEN_GPIO_ATTR_PULL	"zen:pull"

typedef enum {
	ZEN_GPIO_PULL_DISABLED = 0,
	ZEN_GPIO_PULL_DOWN,
	ZEN_GPIO_PULL_UP_4K,
	ZEN_GPIO_PULL_UP_8K,
	ZEN_GPIO_PULL_UP,
	/*
	 * The following are possible values, but not ones that we allow to be
	 * set. That is, these are illegal combinations, but there is nothing
	 * that stops hardware from being able to shout them at us.
	 */
	ZEN_GPIO_PULL_DOWN_UP,
	ZEN_GPIO_PULL_DOWN_UP_4K,
	ZEN_GPIO_PULL_DOWN_UP_8K
} zen_gpio_pull_t;

/*
 * ZEN_GPIO_ATTR_DRIVE_STRENGTH -- rw
 *	uint32_t -- zen_gpio_drive_strength_t
 */
#define	ZEN_GPIO_ATTR_DRIVE_STRENGTH	"zen:drive_strength"

typedef enum {
	ZEN_GPIO_DRIVE_UNKNOWN,
	ZEN_GPIO_DRIVE_40R,
	ZEN_GPIO_DRIVE_60R,
	ZEN_GPIO_DRIVE_80R
} zen_gpio_drive_strength_t;

/*
 * These three attributes are used to control the debounce configuration which
 * ties into interrupt generation.
 *
 * ZEN_GPIO_ATTR_DEBOUNCE_MODE -- rw
 *	uint32 -- zen_gpio_debounce_mode_t
 *
 * This controls how the debounce logic works internally and what actions should
 * be taken.
 *
 * ZEN_GPIO_ATTR_DEBOUNCE_UNIT -- rw
 *	uint32_t -- zen_gpio_debounce_unit_t
 *
 * This controls the unit and graunlarity. This is phrased in terms of units of
 * the RTC clock and translates into 61 us, 244 us, 15.6 ms, and 62.5 ms.
 *
 * ZEN_GPIO_ATTR_DEBOUNCE_COUNT -- rw
 *	 uint32_t
 *
 * This is the number of debounce count units should be used. This is capped to
 * a 4-bit value.
 */
#define	ZEN_GPIO_ATTR_DEBOUNCE_MODE	"zen:debounce_mode"
#define	ZEN_GPIO_ATTR_DEBOUNCE_UNIT	"zen:debounce_unit"
#define	ZEN_GPIO_ATTR_DEBOUNCE_COUNT	"zen:debounce_count"

typedef enum {
	ZEN_GPIO_DEBOUNCE_MODE_NONE = 0,
	ZEN_GPIO_DEBOUNCE_MODE_KEEP_LOW,
	ZEN_GPIO_DEBOUNCE_MODE_KEEP_HIGH,
	ZEN_GPIO_DEBOUNCE_MODE_REMOVE,
} zen_gpio_debounce_mode_t;

typedef enum {
	ZEN_GPIO_DEBOUNCE_UNIT_2RTC = 0,
	ZEN_GPIO_DEBOUNCE_UNIT_8RTC,
	ZEN_GPIO_DEBOUNCE_UNIT_512RTC,
	ZEN_GPIO_DEBOUNCE_UNIT_2048RTC,
} zen_gpio_debounce_unit_t;

/*
 * ZEN_GPIO_ATTR_TRIGGER_MODE -- rw -- uint32_t zen_gpio_trigger_t enum
 *
 * This attribute controls how the device generates interrupts. In particular,
 * this covers whether it's edge or level triggered and what constitutes and
 * edge. Debounce logic still applies.
 */
#define	ZEN_GPIO_ATTR_TRIGGER_MODE	"zen:trigger_mode"

typedef enum {
	ZEN_GPIO_TRIGGER_UNKNOWN = 0,
	ZEN_GPIO_TRIGGER_EDGE_HIGH,
	ZEN_GPIO_TRIGGER_EDGE_LOW,
	ZEN_GPIO_TRIGGER_EDGE_BOTH,
	ZEN_GPIO_TRIGGER_LEVEL_HIGH,
	ZEN_GPIO_TRIGGER_LEVEL_LOW
} zen_gpio_trigger_t;

/*
 * ZEN_GPIO_ATTR_STATUS -- ro
 *	uint32_t -- zen_gpio_status_t
 *
 * This enumeration is a bitfield of status flags that the gpio has.
 */
#define	ZEN_GPIO_ATTR_STATUS	"zen:status"

typedef enum {
	ZEN_GPIO_STATUS_WAKE	= 1 << 0,
	ZEN_GPIO_STATUS_INTR	= 1 << 1,
} zen_gpio_status_t;

/*
 * ZEN_GPIO_ATTR_RAW_REG -- ro
 *	uint32_t
 *
 * This is an attribute which includes the raw register value for the gpio
 * register. This is here for debugging purposes.
 */
#define	ZEN_GPIO_ATTR_RAW_REG	"zen:raw_reg"

#ifdef __cplusplus
}
#endif

#endif /* _SYS_GPIO_ZEN_GPIO_H */